학회 정보

CODES+ISSS 2026: International Conference on Hardware/Software Codesign and System Synthesis

투고 마감일:
2026-03-23 마감됨
통보일:
2026-07-17
개최일:
2026-10-04
개최지:
Barcelona, Spain
개최 횟수:
24
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회원가입 로그인
CCF: B   QUALIS: A2   조회: 82561   팔로우: 56   참가: 7
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마감 카운트다운 배지 삽입
CODES+ISSS
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회반 지수 (CP-I)

72.4 / 100
전체 5,776개 중 307위 · 상위 6%

소프트웨어 공학 분야 249개 중 40위

학술적 인정 (35%)
92
투고 선별성 (20%) 데이터 없음 — 중립 기준값 50점으로 계산 —
개최 횟수 (20%)
87
커뮤니티 관심도 (10%)
54
공개 자료 충실도 (15%)
50

사용한 입력: 수록 등급: CCF B, QUALIS A2 · 확인되는 개최 횟수: 24 · 회반에서 팔로우 중인 연구자: 56명 · 지난 24개월 동안 이 페이지를 연 연구자: 6명

공개 자료에서 빠진 항목: 역대 게재율 (+4.5) · 역대 회차 (+3.0)
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신뢰도 80% — 점수 중 중립 기준값이 아니라 실제 관측된 데이터에 근거한 비율. 이 점수는 어떻게 계산되나 · 전체 순위 보기 · 알고리즘 버전 1.2 · 산출일 2026-11-12

이 기관들의 연구자가 이 학회를 추적하고 있습니다

Huazhong University of Science and Technology 9
Peking University 4
Shandong University 4
Institute of Information Engineering, Chinese Academy of Sciences 3
University of Science and Technology of China 3

연구자가 자신의 프로필에 입력한 소속을 기준으로 하며, 별도로 확인하지 않습니다.

논문 모집

CODES+ISSS 2026 (International Conference on Hardware/Software Codesign and System Synthesis) is a CCF B / QUALIS A2 conference held in Barcelona, Spain on 2026-10-04. The paper submission deadline is 2026-03-23. Acceptance notifications are sent on 2026-07-17.

The IEEE/ACM International Conference on Codesign of Embedded Systems (CODES) is the premier conference in system-level design, hardware/software co-design, modeling, analysis, and implementation of modern embedded systems, cyber-physical systems, and internet-of-things, from system-level specification and optimization to synthesis of system-on-chip hardware/software implementations. CODES is part of Embedded Systems Week (ESWEEK), the premier event covering all aspects of hardware and software design for smart, intelligent, and connected computing systems. Journal-Integrated Publication Model: All full papers accepted in EMSOFT’25 will be published in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). All late-breaking papers accepted in one of the three conferences will be published in IEEE Embedded Systems Letters (ESL). See details at http://esweek.org/author-information In-Person Presentation Requirement: An accepted paper will be removed from the journal (TCAD or ESL) and the technical program unless both of the following conditions are satisfied: (1) One author of the accepted paper must register at the full conference (author registration) rate, and (2) An author of the accepted paper must present (in-person) the paper in the conference. See details at http://esweek.org/author-information Topics of Interests Track 1) System-level design – Specification, modelling, refinement, synthesis, and partitioning of embedded systems, hardware-software co-design, hybrid system modeling and design, model-based design, design for adaptivity and reconfigurability. Track 2) Application-specific design – Analysis, design, and optimization techniques for multimedia, medical, automotive, transportation, cyber-physical, aerospace, IoT, space computing and other application domains. Track 3) System architecture – Heterogeneous systems, many-cores, and distributed systems, architecture and micro-architecture design, exploration and optimizations of application-specific processors and accelerators, reconfigurable, self-programmable, and self-adaptive architectures, storage, memory systems, networks-on-chip, and networks-of-networks. Track 4) Simulation, validation, and verification – Hardware/software co-simulation, verification and validation methodologies, formal verification, hardware accelerated simulation, simulation and verification languages, models, and benchmarks. Track 5) Embedded software – Language and library support, compilers, runtimes, parallelization, software verification, memory management, virtual machines, operating systems, real-time support, middleware. Track 6) Safety, security, and reliability – Cross-layer reliability, resiliency and fault tolerance, test methodology, design for security, reliability, and testability, hardware security, security for embedded, CPS, and IoT devices. Track 7) Power-aware systems – Power-aware, thermal-aware and energy-aware system design and methodologies, ranging from low-power embedded and cyber-physical systems, IoT devices, to energy-efficient large-scale systems such as cloud datacenters, federated systems, green computing, and smart grids. Track 8) Embedded artificial intelligence – Hardware and software design, implementation, and optimization for machine learning that are specially designed for resource- and power-constrained embedded, CPS, and IoT devices. Track 9) Industrial practices and case studies – Practical impact on current and/or future industries, application of state-of-the-art methodologies and tools in wireless, networking, multimedia, automotive, cyber-physical, IoT, aerospace, space computing, federated systems, etc.
최종 수정: Dou Sun ()

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2011Reliable Software for Unreliable Hardware: Embedded Code Generation aiming at Reliability
2010Worst-case Performance Analysis of Synchronous Dataflow Scenarios
2009A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
2008Hardware/Software Partitioning of Floating Point Software Applications to Fixed-Point Coprocessor Circuits
2007Dynamic security domain scaling on symmetric multiprocessors for future high-end embedded systems
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관련 저널

CCF정식 명칭영향력 지수출판사ISSN
BDesigns, Codes and Cryptography1.2Springer0925-1022
BSoftware & Systems Modeling3.2Springer1619-1366
BPattern Recognition9.1Elsevier0031-3203
BIEEE Transactions on Neural Networks and Learning Systems8.9IEEE1045-9227
BInformation Sciences6.0Elsevier0020-0255
BComputer Networks4.7Elsevier1389-1286
BComputers & Security5.4Elsevier0167-4048
BIEEE Transactions on Intelligent Transportation Systems8.4IEEE1524-9050
BJournal of Systems and Software3.8Elsevier0164-1212
BInformation Processing & Management6.9Elsevier0306-4573

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