会议信息

HiPEAC 2027: International Conference on High Performance and Embedded Architectures and Compilers

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HiPEAC
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截稿日期:
2026-06-01
通知日期:
会议日期:
2027-01-18
会议地点:
Glasgow, Scotland, UK
届数:
22
CCF: B   QUALIS: B2   浏览: 49075   关注: 55   参加: 3

会伴指数 (CP-I)

67.1 / 100
全站第 388 名 / 共 5,682 个会议 · 前 7%

软件工程 第 53 / 247 系统与体系结构 第 68 / 341

学术认可 (35%)
82
投稿选择性 (20%) 无数据 —— 按中性基准 50 分计入 —
会议传承 (20%)
84
社区关注 (10%)
63
资料公开度 (15%)
35

用到的输入: 收录等级：CCF B, QUALIS B2 · 有据可查的届次：22 · 在会伴关注它的研究者：55 人 · 过去 24 个月打开过本页的研究者：24 人

公开资料里还缺: 历年录用率 (+4.5) · 历届信息 (+3.0) · 最佳论文记录 (+2.3)
主办方认领本会议后，可直接在这一页补上；分数每晚重算。如何提升这个分数

置信度 80% —— 分数中有多大比例来自实际观测到的数据，而不是中性基准。 这个分数是怎么算出来的 · 查看完整榜单 · 算法版本 1.1 · 算于 2026-09-14

征稿

HiPEAC 2027 (International Conference on High Performance and Embedded Architectures and Compilers) is a CCF B / QUALIS B2 conference held in Glasgow, Scotland, UK on 2027-01-18. The paper submission deadline is 2026-06-01.

HiPEAC has been pioneering the journal-first publication model. Journal-first means that the manuscript selection process for the conference is outsourced to a journal (ACM TACO). Manuscripts can be submitted to the journal at any time throughout the year as regular journal submissions. For all manuscripts submitted before June 1, 2026, ACM TACO guarantees that the final decision (including two rounds of revision) will be communicated before November 15. All authors of original work papers accepted in the journal between November 15, 2025 and November 15, 2026 will get an invitation to present their work during the paper track of the HiPEAC conference. There are no conference proceedings published. Topics of interest include, but are not limited to: Processor, memory, and storage systems architecture Parallel, multi-core and heterogeneous systems Interconnection networks Architectural support for programming productivity Power, performance and implementation efficient designs Reliability and real-time support in processors, compilers and run-time systems Application-specific processors, accelerators and reconfigurable processors Architecture and programming environments for GPU-based computing Simulation and methodology Architectural and run-time support for programming languages Programming models, frameworks and environments for exploiting parallelism Compiler techniques Feedback-directed optimization Program characterization and analysis techniques Dynamic compilation, adaptive execution, and continuous profiling/optimization Binary translation/optimization Code size/memory footprint optimizations
由 Dou Sun 最后更新于

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