Conference Information

SCOPES 2017: International Workshop on Software and Compilers for Embedded Systems

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Submission Date:
2017-03-03 Extended
Notification Date:
2017-04-07
Conference Date:
2017-06-12
Location:
Sankt Goar, Germany
Years:
20
ICORE: C   Viewed: 14158   Tracked: 1   Attend: 0

Call For Papers

SCOPES 2017 (International Workshop on Software and Compilers for Embedded Systems) is a ICORE C conference held in Sankt Goar, Germany on 2017-06-12. The paper submission deadline is 2017-03-03 (extended). Acceptance notifications are sent on 2017-04-07.

A next edition of the workshop on Software and Compilers for Embedded Systems (SCOPES) will be organized in 2017. The workshop will feature a combination of research papers and research presentations (details see below). The papers and presentation abstracts will also be published in the ACM digital library. The workshop is held in cooperation with ACM SIGBED and EDAA. AIM AND SCOPE The influence of embedded systems is constantly growing. Increasingly powerful and versatile devices are developed and put on the market at a fast pace. Their functionality and number of features is increasing, and so are the constraints on the systems concerning size, performance, energy dissipation and timing predictability. To meet all these constraints, multi-processor systems on a chip (MPSoCs) are becoming popular in embedded systems. In order to meet the performance and energy constraints of embedded applications, heterogeneous architectures incorporating functional units optimized for specific functions are commonly employed. This technological trend has dramatic consequences on the parallelization, mapping, compiler and design technology used to develop these systems. The SCOPES workshop focuses on the software generation process for modern embedded systems. Topics of interest include all aspects of the compilation and mapping process of embedded single and multi-processor systems. This includes (but is not limited to): models of computation and programming languages; performance analysis techniques for models of computation; automatic code parallelization techniques; mapping and scheduling techniques for embedded multi-processor systems; code generation techniques for embedded single- and multi-processor architectures; design-space exploration techniques for use in the HW/SW codesign process; techniques to exploit the dynamic behavior in embedded applications; interactions between operating systems and compilers; techniques for compiler aided profiling, measurement, debugging and validation of embedded software. WORKSHOP STRUCTURE The workshop structure (presentations followed by intensive discussions) allows for an interactive atmosphere in which industrial and academic representatives can exchange new ideas and trends in the area MPSoC mapping and code generation.
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