Información de la conferencia

MICRO 2026: International Symposium on Microarchitecture

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Día de Entrega:
2026-03-31
Fecha de Notificación:
2026-07-07
Fecha de conferencia:
2026-10-31
Ubicación:
Athens, Greece
Ediciones:
59
CCF: a   CORE: a   QUALIS: a1   Vistas: 207648   Seguidores: 114   Asistentes: 5

Solicitud de Artículos

MICRO 2026 (International Symposium on Microarchitecture) is a CCF A / CORE A / QUALIS A1 conference held in Athens, Greece on 2026-10-31. The paper submission deadline is 2026-03-31. Acceptance notifications are sent on 2026-07-07.

The IEEE/ACMInternational Symposium on Microarchitecture® (MICRO)is the premier forum for the presentation and discussion of new ideas in microarchitecture, compilers, hardware/software interfaces, and the design of advanced computing and communication systems. The goal of MICRO is to bring together researchers in microarchitecture, compilers, and systems to foster technical exchange and advance the state of the art. The MICRO community has long benefited from close interaction between academic researchers and industrial designers. We aim to continue and strengthen this tradition at the 59th International Symposium on Microarchitecture (MICRO 2026), which will be held in Athens, Greece. New for MICRO 2026: In addition to the main research track, MICRO 2026 will feature its inaugural Industry Track, designed to highlight deep technical insights from real-world, production-focused architectural work. The Industry Track has a dedicated call for papers and a tailored review process to better accommodate industry-specific contributions. We invite original research paper submissions related to (but not limited to) the following topics: Microarchitectural, architectural, compiler, and hybrid techniques for improving performance, power, and energy efficiency security, privacy, and reliability cost, complexity, and scalability programmer productivity, predictability, quality of service, and sustainability Processor, memory, and storage architectures Multicore and multiprocessor systems Instruction-, thread-, and data-level parallelism Prediction and Speculation mmchanisms Memory Hierarchy design Cloud and datacenter-scale computing IoT, mobile, and embedded architectures Interconnection networks, routers, and network interface architectures Accelerator-based, application-specific, and reconfigurable architectures Architectural support for programming languages, compilation, software development, virtualization, security, and privacy Architectures for emerging technologies and applications Architectural support for non-volatile/persistent memory Quantum computing In-/near-memory or in-/near-storage processing Effects of circuits and technology on architecture Architecture modeling, simulation and benchmarking methodologies Evaluation and measurement of real computing systems
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Tasa de aceptación

Tasa de aceptación media: 31.3% en 12 años (1992–2004).

AñoEnviadosAceptadosAceptados(%)
20041582918.4%
20031343526.1%
20021503624%
20011442920.1%
20001103128.2%
19991312720.6%
19981082825.9%
1996943031.9%
1995903741.1%
1994632742.9%
1993632742.9%
1992794253.2%

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