Journal Information
IEEE Micro
https://www.computer.org/csdl/magazines/mi
Impact Factor:
3.172
Publisher:
IEEE
ISSN:
0272-1732
Viewed:
9823
Tracked:
9
Call For Papers
IEEE Micro, a bimonthly publication of the IEEE Computer Society,  reaches an international audience of microcomputer and microprocessor  designers, system integrators, and users. Readers want to increase  their technical knowledge of computers and peripherals; systems,  components, and subassemblies; communications, instrumentation,  and control equipment; and software.
Last updated by Dou Sun in 2021-04-08
Special Issues
Special Issue on Compiling for Accelerators
Submission Date: 2021-12-15

Hardware accelerators are rapidly becoming a central architectural feature to improve computation power performance. CPU ISA extensions, custom-designed engines, and FPGA-based systems have been proposed as acceleration architectures to improve program execution in scientific, machine-learning, database, and other application domains. Although much effort has been devoted to the design of accelerators, there is still a large gap of knowledge on how to make effective use of and compile for such architectures. As history has already taught us, having a great architecture is only half of the path to designing an efficient computing machine. Understanding the techniques required for quality code generation is central to the long-term establishment of an acceleration-based architectural paradigm. This special issue of IEEE Micro will explore academic and industrial research on topics that relate to compiling for accelerators. Topics of interest include, but are not limited to: Compiling for CPU ISA extensions Code generation for neural processing units Compiling for neural network training Programming linear algebra engines Code generation and programming for database accelerators Processor-accelerator interface design and programmability Compiling for energy efficiency Pattern matching and code replacement for acceleration instructions High-level synthesis design of custom engines DSL and parallel programming models for accelerators Compiler intermediate representation (IR) and optimization techniques for accelerators Programming FPGAs for custom computing engines Tools and libraries to support code generation for accelerators Important Dates Submission Deadline: December 15, 2021 Initial notifications: March 15, 2022 Revised papers due: April 8, 2022 Final notifications: May 13, 2022 Final versions due: May 31, 2022 Publication: July/August 2022 Submission Guidelines Please see the Author Information page and the Magazine Peer Review page for more information. Please submit electronically through ScholarOne Manuscripts, selecting this special-issue option. For the manuscript submission, acceptable file formats include Microsoft Word (*) and PDF. Manuscripts should not exceed 5,000 words including references, with each average-size figure counting as 250 words toward this limit. Please include all figures and tables, as well as a cover page with author contact information (name, postal address, phone, fax, and email address) and a 200-word abstract. Submitted manuscripts must not have been previously published or currently submitted for publication elsewhere, and all manuscripts must be cleared for publication. All previously published papers must have at least 30% new content compared to any conference (or other) publication. Accepted articles will be edited for structure, style, clarity, and readability. Questions? Contact guest editors Guido Araujo and Lucas Wanner at micro4-22@computer.org, or the editor-in-chief Lizy John at ljohn@ece.utexas.edu. Please direct ScholarOne-related questions to the IEEE Micro magazine assistant at micro-ma@computer.org.
Last updated by Dou Sun in 2021-04-09
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