Conference Information
HiPC 2026: IEEE International Conference on High Performance Computing, Data, and Analytics
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Submission Date: |
2026-06-17 |
Notification Date: |
2026-09-18 |
Conference Date: |
2026-12-16 |
Location: |
Bengaluru, India |
Years: |
33 |
CCF: c QUALIS: b1 Viewed: 129089 Tracked: 103 Attend: 14
Call For Papers
HiPC 2026 will be the 33rd edition of the IEEE International Conference on High Performance Computing. HiPC serves as a forum to present current work by researchers in the areas of high performance computing, artificial intelligence, hardware systems, edge computing and quantum computing and their scientific, engineering, and commercial applications.
Authors are invited to submit original unpublished research manuscripts that demonstrate current research in all areas of high performance computing, artificial intelligence, and quantum computing platforms and their applications. Each submission should be submitted under one of the five broad themes listed below. HiPC proceedings appear in IEEE Xplore Digital Library, which is Scopus-indexed.
Distinguished paper awards will be given for outstanding contributed papers. Authors of selected high-quality papers in HiPC 2026 will be invited to submit extended versions of their papers for possible publication in a special issue of the Journal of Parallel and Distributed Computing.
High Performance Computing Systems and Applications
This track invites papers that describe original research on using HPC systems and applications, and related advances. Examples of topics of interest include (but not limited to):
New parallel and distributed algorithms and design techniques; advances in enhancing algorithmic properties or providing guarantees;
Algorithmic techniques for resource allocation and optimization (e.g., scheduling, load balancing, resource management);
Provably efficient parallel and distributed algorithms for advanced scientific computing and irregular applications (e.g., numerical linear algebra, graph algorithms, computational biology);
High performance processing architectures (e.g., reconfigurable, system-on-chip, many cores, vector processors, tensor cores);
Memory, cache, networks, and storage architectures (e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers, parallel I/O);
Shared and distributed memory parallel applications
Techniques to enhance parallel performance, or parallel application development and productivity
Software for cloud, data center, and exascale platforms
Software and programming paradigms for heterogeneous platforms
Artificial Intelligence Systems and Applications
This track invites papers that describe original research on using AI/ML for systems design or systems design for AI/ML application and related advances. Examples of topics of interest include (but not limited to):
AI/ML methods for system design and optimization (e.g. efficient design space exploration, job scheduling, energy efficiency) in computing systems;
AI/ML methods that benefit HPC applications or HPC system management;
Scaling and accelerating machine learning, deep learning, natural language processing and computer vision applications;
Efficient model training, inference, and serving (includes specialized hardware design and SW techniques);
Fairness, interpretability, and explainability for AI/ML applications;
End-to-end machine learning pipeline optimization (data prep and data cleaning);
Compound AI systems and AI agent systems;
Methods, algorithms, optimizations, systems and software architecture for scaling AI/ML applications on high-performance computing
Machine learning benchmarks for parallel and distributed platforms and datasets.
Quantum Computing Systems and Applications
This track invites papers that describe original research on designing innovative quantum and quantum-classical hybrid algorithms, hardware, applications, compiler and runtime systems. Examples of topics of interest include (but not limited to):
Design and development of innovative quantum algorithms to address complex computational challenges across various science domains.
Protocols, design, and evaluation of hardware architecture and software frameworks enabling integration of classical computing and quantum computing (e.g., quantum computing architecture, error mitigation, error correction, hybrid quantum-classical applications & benchmarks)
Programming languages, compilers, and optimization techniques for developing quantum system software, and their integration into hybrid quantum-classical computing workflows
Quantum system software for quantum computers based on different qubit technology (superconducting, neutral atom, photonics).
Optimizations, tools, simulators, and testbeds for quantum-enhanced smart systems
Quantum computing system architecture and software co-design for AI workloads
Novel AI methods and tools for enhancing the utility of near-term quantum computers
System software, applications, and architecture for quantum sensing and quantum networks/communications design & control.
Edge Computing Systems and Applications
This track invites papers that describe original research on building and using edge computing systems and applications, and related advances. Examples of topics of interest include (but not limited to):
AI and IoT applications, digital twins, and other edge-driven applications
Emerging edge workloads and novel systems support
Algorithms, systems, and paradigms that enable collaborative, distributed, decentralized, communication efficient learning at the edge or hybrid cloud-edge
Learning-based resource management at the edge
Serverless and other programming models for edge environments
DevOps practices across edge and cloud
Multitenancy and resource sharing at the edge
Edge-driven HPC and HPC-steered edge computing
Energy-efficient, low-power, and sustainable hardware/software architectures
Green and sustainable Edge AI
Cyber-security and privacy in edge computing
Security and privacy for distributed learning and inference
Data and AI lifecycle management across edge and cloud
Hardware Systems, Accelerators, and Emerging Technologies
This track invites papers that describe original research on building hardware systems, various accelerators, and emerging technologies. Examples of topics of interest include (but not limited to):
Post-exascale high-performance computing
Post-Moore’s Law Systems: Neuromorphic, biologically-inspired, superconducting, and hyperdimensional computing
Applications leveraging GPUs, FPGAs, TPUs, DPUs, on-chip accelerators, or other novel architectures.
Heterogeneous system architectures (ARM, RISC-V, custom extensions)
Memory hierarchies and novel memory systems
Energy efficiency and thermal considerations
Security and reliability in hardware systems
Performance modeling and prediction
High-level programming models (such as OpenMP, OpenACC, SYCL, OneAPI, Kokkos, Raja)
Low-level programming interfaces (such as OpenCL, CUDA)
Debugging, profiling, testing, and verification methods for hardware systems
Memory management and data movement optimization
Last updated by Dou Sun in 2026-04-09
Acceptance Ratio
| Year | Submitted | Accepted | Accepted(%) |
|---|---|---|---|
| 2020 | 127 | 33 | 26% |
| 2019 | 171 | 39 | 22.8% |
| 2018 | 151 | 33 | 21.9% |
| 2017 | 184 | 42 | 22.8% |
| 2016 | 160 | 40 | 25% |
| 2015 | 201 | 48 | 23.9% |
| 2014 | 212 | 49 | 23.1% |
| 2013 | 196 | 49 | 25% |
| 2012 | 163 | 41 | 25.2% |
| 2011 | 206 | 40 | 19.4% |
| 2010 | 208 | 40 | 19.2% |
| 2009 | 320 | 35 | 10.9% |
| 2008 | 317 | 46 | 14.5% |
| 2007 | 253 | 52 | 20.6% |
| 2006 | 335 | 52 | 15.5% |
| 2005 | 362 | 50 | 13.8% |
| 2004 | 214 | 48 | 22.4% |
| 2003 | 164 | 48 | 29.3% |
| 2002 | 145 | 57 | 39.3% |
| 2001 | 108 | 29 | 26.9% |
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