Where is NANOARCH 2016 held?

NANOARCH 2016 is held in Beijing, China.

When does NANOARCH 2016 take place?

NANOARCH 2016 takes place on 2016-07-18.

Conference Information

NANOARCH 2016: ACM/IEEE International Symposium on Nanoscale Architectures

Q: What is the submission deadline for NANOARCH 2016?

The paper submission deadline for NANOARCH 2016 (ACM/IEEE International Symposium on Nanoscale Architectures) is 2016-04-15.

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Submission Date:

2016-04-15

Notification Date:

2016-05-15

Conference Date:

2016-07-18

Location:

Beijing, China

Years:

12

Viewed: 18960 Tracked: 1 Attend: 0

Conference Partner Index (CP-I)

46.6 / 100

Ranked #2,386 of 5,682 conferences · Top 42%

Academic recognition (35%)	No data - scored at the neutral baseline of 50	—
Submission selectivity (20%)	No data - scored at the neutral baseline of 50	—
Editions held (20%)		69
Community attention (10%)		15
Public record completeness (15%)		25

Inputs used: Editions on record: 12 · Researchers following it here: 1 · Researchers who opened this page in the past 24 months: 2

Missing from the public record: Historical acceptance rates (+4.5) · Past editions (+3.0) · Best-paper records (+2.3)
Organizers can add these from this page after claiming the conference; scores are recomputed nightly. How to raise this score

Confidence 45% - the share of the score backed by observed data rather than the neutral baseline. How this score is calculated · Browse the ranking · Algorithm version 1.1 · Computed 2026-09-14

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Call For Papers

NANOARCH 2016 (ACM/IEEE International Symposium on Nanoscale Architectures) is an academic conference held in Beijing, China on 2016-07-18. The paper submission deadline is 2016-04-15. Acceptance notifications are sent on 2016-05-15.

This 12th symposium will incorporate several exciting special sessions (e.g., beyond charge-based computing, benefits and challenges with emerging memory devices, and nanoelectronics for biomedical systems) and opportunities for interaction. In addition to Regular Papers (of up to 6 pages in length), we also invite 2-page Concept Papers in the area of nanofabrication, nano-computing, and emerging applications of nanosystems for presentation in Special Sessions. These concept papers would present lessdeveloped but radical and highly innovative work. NANOARCH is the annual cross-disciplinary forum for the discussion of novel post-CMOS and advanced nanoscale CMOS directions. The symposium seeks papers on innovative ideas for solutions to the principal challenge facing integrated electronics in the 21st century how to design, fabricate, and integrate nanosystems to overcome the fundamental limitations of CMOS. In particular, such systems could as follow: (1) contain unconventional nanodevices with unique capabilities, including directions beyond simple switches, (2) introduce new logic and memory concepts, (3) involve novel circuit styles, (4) introduce new concepts for computing, (5) explore security architectures with nanotechnology, (6) reconfigure and/or mask faults at much higher rates than in CMOS, (7) involve new paradigms for manufacturing, and (8) rethink the methodologies and design tools involved. Example topics (both theoretical and experimental) of interest include (but are not limited to): Nanoelectronic circuits, nanofabrics, computing paradigms and nanoarchitectures Paradigms and nanoarchitectures for computing with unpredictable devices Security architectures with nanofabrics Reliability aware computing 3D hybrid nanoarchitectures 2D/3D/hybrid nanodevice integration and manufacturing, with defect and fault tolerance Nanodevice and nanocircuit models, methodologies and computer aided design tools Fundamental limits of computing at the nanoscale

Last updated by Dou Sun on 2016-02-27

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