会议信息

NANOARCH 2016: ACM/IEEE International Symposium on Nanoscale Architectures

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截稿日期:
2016-04-15 已截稿
通知日期:
2016-05-15
会议日期:
2016-07-18
会议地点:
Beijing, China
届数:
12
浏览: 19289   关注: 1   参加: 0
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NANOARCH
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会伴指数 (CP-I)

46.6 / 100
全站第 2,525 名 / 共 5,763 个会议 · 前 44%
学术认可 (35%) 无数据 —— 按中性基准 50 分计入 —
投稿选择性 (20%) 无数据 —— 按中性基准 50 分计入 —
会议传承 (20%)
69
社区关注 (10%)
15
资料公开度 (15%)
25

用到的输入: 有据可查的届次：12 · 在会伴关注它的研究者：1 人 · 过去 24 个月打开过本页的研究者：2 人

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置信度 45% —— 分数中有多大比例来自实际观测到的数据，而不是中性基准。 这个分数是怎么算出来的 · 查看完整榜单 · 算法版本 1.2 · 算于 2026-10-29

征稿

NANOARCH 2016 (ACM/IEEE International Symposium on Nanoscale Architectures) is an academic conference held in Beijing, China on 2016-07-18. The paper submission deadline is 2016-04-15. Acceptance notifications are sent on 2016-05-15.

This 12th symposium will incorporate several exciting special sessions (e.g., beyond charge-based computing, benefits and challenges with emerging memory devices, and nanoelectronics for biomedical systems) and opportunities for interaction. In addition to Regular Papers (of up to 6 pages in length), we also invite 2-page Concept Papers in the area of nanofabrication, nano-computing, and emerging applications of nanosystems for presentation in Special Sessions. These concept papers would present lessdeveloped but radical and highly innovative work. NANOARCH is the annual cross-disciplinary forum for the discussion of novel post-CMOS and advanced nanoscale CMOS directions. The symposium seeks papers on innovative ideas for solutions to the principal challenge facing integrated electronics in the 21st century how to design, fabricate, and integrate nanosystems to overcome the fundamental limitations of CMOS. In particular, such systems could as follow: (1) contain unconventional nanodevices with unique capabilities, including directions beyond simple switches, (2) introduce new logic and memory concepts, (3) involve novel circuit styles, (4) introduce new concepts for computing, (5) explore security architectures with nanotechnology, (6) reconfigure and/or mask faults at much higher rates than in CMOS, (7) involve new paradigms for manufacturing, and (8) rethink the methodologies and design tools involved. Example topics (both theoretical and experimental) of interest include (but are not limited to): Nanoelectronic circuits, nanofabrics, computing paradigms and nanoarchitectures Paradigms and nanoarchitectures for computing with unpredictable devices Security architectures with nanofabrics Reliability aware computing 3D hybrid nanoarchitectures 2D/3D/hybrid nanodevice integration and manufacturing, with defect and fault tolerance Nanodevice and nanocircuit models, methodologies and computer aided design tools Fundamental limits of computing at the nanoscale
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