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ICMTS 2027: IEEE International Conference on Microelectronic Test Structures

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投稿締切日:
2026-11-01 残り 19 日
通知日:
2027-01-15
開催日:
2027-04-05
開催地:
Udine, Italy
開催回数:
39
閲覧: 1050   フォロー: 0   参加: 0
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ICMTS
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会伴インデックス (CP-I)

53.4 / 100
全 5,696 件中 第 1,029 位 · 上位 19%

電気・電子工学 分野 512 件中 第 39 位

学術的評価 (35%) データなし — 中立の基準値 50 点として算入 —
投稿の選択性 (20%) データなし — 中立の基準値 50 点として算入 —
開催回数 (20%)
99
コミュニティの注目度 (10%)
8
公開情報の充実度 (15%)
35

使用した入力: 確認できる開催回数:39 · 過去 24 か月にこのページを開いた研究者:2 人

公開情報で不足しているもの: 過去の採択率 (+4.5) · 過去の開催回 (+3.0) · 最優秀論文の記録 (+2.3)
主催者は会議を認証申請したうえで、このページから直接追加できます。スコアは毎晩再計算されます。このスコアを上げるには

信頼度 45% — スコアのうち、中立の基準値ではなく実際に観測されたデータに基づく割合。 このスコアの算出方法 · ランキングを見る · アルゴリズム版 1.1 · 算出日 2026-10-13

論文募集

ICMTS 2027 (IEEE International Conference on Microelectronic Test Structures) is an academic conference held in Udine, Italy on 2027-04-05. The paper submission deadline is 2026-11-01. Acceptance notifications are sent on 2027-01-15.

Looking for the best opportunity to present and discuss your ideas and results about test structures, measurements, and characterization? This is your chance! Join the 39th ICMTS conference. This conference is co-sponsored by the IEEE Electron Devices Society. All presented papers will be submitted for potential inclusion in IEEE Xplore®. Original papers presenting new developments in topics relevant to ICMTS, include but not limited to test structures, measurements, and results, as outlined below. This one-track technical program will award a Best Paper that will be voted on by the Technical Program Committee. In addition, Tutorial Short Course will precede the main conference while several of the best measurement, equipment design, and manufacturing experts, will participate in the equipment exhibition and presentations. Design Methodologies, Verification Within-die circuits for process characterisation/monitoring Design enablement – Characterisation and validation of digital and analog libraries Devices and Circuit Modeling Measurement techniques DC, AC and RF measurements – setup, test and analysis Reliability test – including thermal stability, failure analysis etc. Characterization from room to mK temperatures of semiconductor technologies and materials Statistical analysis, variability, throughput increase, smart test strategies Use of machine learning and AI in analysis of data sets – parameter extraction etc. Wafer probing, within-die measurements, in-line metrology Throughput, testing strategies, yield enhancement and process control tests Applications Emerging memory technologies (single cell, arrays, and application in neural networks) Emerging transistor technologies for digital/analog/power applications Emerging packaging technologies (3DIC, wafer-on-wafer stacking, chiplet integration) Photonic devices - silicon integration, new displays (OLED, μ-displays) Flexible electronics and sensors (organic and inorganic materials) M(N)EMS, actuators, sensors, PV cells and other emerging devices Quantum computing and cryo-electronics The author’s abstract submission consists of up to four pages in PDF format (font-embedded). The first page should include a title, a 50-word summary, author name(s), full address, and the e-mail of the author with whom you want us to correspond. The body of the abstract should consist of one page of text (800 to 1000 words) and up to two pages of major figures and tables. The selection process will be based on the technical merit and will be highly weighted in favour of abstracts with high test structure content, giving a clear illustration of the test structure and including measurements and data analysis.
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関連ジャーナル

CCF正式名称インパクトファクター出版社ISSN
Microelectronic Engineering3.1Elsevier0167-9317
IEEE Design & Test1.9IEEE2168-2356
Computers & Structures4.8Elsevier0045-7949
Applied Categorical Structures0.6Springer0927-2852
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CKnowledge-Based Systems7.2Elsevier0950-7051
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