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ICMTS 2027: IEEE International Conference on Microelectronic Test Structures

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截稿日期:
2026-11-01 还有 19 天
通知日期:
2027-01-15
会议日期:
2027-04-05
会议地点:
Udine, Italy
届数:
39
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全站第 1,029 名 / 共 5,696 个会议 · 前 19%

电气与电子工程 第 39 / 512

学术认可 (35%) 无数据 —— 按中性基准 50 分计入 —
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会议传承 (20%)
99
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8
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35

用到的输入: 有据可查的届次：39 · 过去 24 个月打开过本页的研究者：2 人

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置信度 45% —— 分数中有多大比例来自实际观测到的数据，而不是中性基准。 这个分数是怎么算出来的 · 查看完整榜单 · 算法版本 1.1 · 算于 2026-10-13

征稿

ICMTS 2027 (IEEE International Conference on Microelectronic Test Structures) is an academic conference held in Udine, Italy on 2027-04-05. The paper submission deadline is 2026-11-01. Acceptance notifications are sent on 2027-01-15.

Looking for the best opportunity to present and discuss your ideas and results about test structures, measurements, and characterization? This is your chance! Join the 39th ICMTS conference. This conference is co-sponsored by the IEEE Electron Devices Society. All presented papers will be submitted for potential inclusion in IEEE Xplore®. Original papers presenting new developments in topics relevant to ICMTS, include but not limited to test structures, measurements, and results, as outlined below. This one-track technical program will award a Best Paper that will be voted on by the Technical Program Committee. In addition, Tutorial Short Course will precede the main conference while several of the best measurement, equipment design, and manufacturing experts, will participate in the equipment exhibition and presentations. Design Methodologies, Verification Within-die circuits for process characterisation/monitoring Design enablement – Characterisation and validation of digital and analog libraries Devices and Circuit Modeling Measurement techniques DC, AC and RF measurements – setup, test and analysis Reliability test – including thermal stability, failure analysis etc. Characterization from room to mK temperatures of semiconductor technologies and materials Statistical analysis, variability, throughput increase, smart test strategies Use of machine learning and AI in analysis of data sets – parameter extraction etc. Wafer probing, within-die measurements, in-line metrology Throughput, testing strategies, yield enhancement and process control tests Applications Emerging memory technologies (single cell, arrays, and application in neural networks) Emerging transistor technologies for digital/analog/power applications Emerging packaging technologies (3DIC, wafer-on-wafer stacking, chiplet integration) Photonic devices - silicon integration, new displays (OLED, μ-displays) Flexible electronics and sensors (organic and inorganic materials) M(N)EMS, actuators, sensors, PV cells and other emerging devices Quantum computing and cryo-electronics The author’s abstract submission consists of up to four pages in PDF format (font-embedded). The first page should include a title, a 50-word summary, author name(s), full address, and the e-mail of the author with whom you want us to correspond. The body of the abstract should consist of one page of text (800 to 1000 words) and up to two pages of major figures and tables. The selection process will be based on the technical merit and will be highly weighted in favour of abstracts with high test structure content, giving a clear illustration of the test structure and including measurements and data analysis.
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