Where is HLDVT 2016 held?

HLDVT 2016 is held in Silicon Valley, California, USA.

When does HLDVT 2016 take place?

HLDVT 2016 takes place on 2016-10-07.

Conference Information

HLDVT 2016: International High-Level Design, Validation, and Test Workshop

Q: What is the submission deadline for HLDVT 2016?

The paper submission deadline for HLDVT 2016 (International High-Level Design, Validation, and Test Workshop) is 2016-07-24 (extended).

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Submission Date:

2016-07-24 Extended

Notification Date:

2016-08-15

Conference Date:

2016-10-07

Location:

Silicon Valley, California, USA

Years:

18

Viewed: 14408 Tracked: 1 Attend: 0

Conference Partner Index (CP-I)

48.6 / 100

Ranked #1,818 of 5,647 conferences · Top 33%

Academic recognition (35%)	No data - scored at the neutral baseline of 50	—
Submission selectivity (20%)	No data - scored at the neutral baseline of 50	—
Editions held (20%)		79
Community attention (10%)		15
Public record completeness (15%)		25

Inputs used: Editions on record: 18 · Researchers following it here: 1 · Researchers who opened this page in the past 24 months: 2

Missing from the public record: Historical acceptance rates (+4.5) · Past editions (+3.0) · Best-paper records (+2.3)
Organizers can add these from this page after claiming the conference; scores are recomputed nightly. How to raise this score

Confidence 45% - the share of the score backed by observed data rather than the neutral baseline. How this score is calculated · Browse the ranking · Algorithm version 1.1 · Computed 2026-09-03

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Call For Papers

HLDVT 2016 (International High-Level Design, Validation, and Test Workshop) is an academic conference held in Silicon Valley, California, USA on 2016-10-07. The paper submission deadline is 2016-07-24 (extended). Acceptance notifications are sent on 2016-08-15.

The 18th HLDVT workshop aims to bring together a community of researchers in the areas of design, validation, and test of hardware, software, cyber-physical systems, biological systems, and biochips. The workshop addresses the integration of multiple functions on-chip/in-system at higher levels of design abstraction, and the techniques and methodologies for modeling, analyzing, and validating such systems. In particular, the workshop has become a unique forum for researchers and practitioners to discuss the practical issues associated with validation of extremely large designs. Topics of interest include, but are not limited to: - Simulation-Based Validation - Formal Verification, and Hybrid Methods - Design Abstraction, and Behavioral Modeling - Error Trace Interpretation, and Debugging - Functional Safety/Safety-critical System Verification - On-Chip, and Core-Based Testing - Test Generation for Defects, Design Errors, and Delay Faults - Hardware/Software, and Mixed-signal System Co-Validation - Emulation, and Prototyping - Post-silicon Validation, and Debug. Paper Submission: The Program Committee invites authors to submit papers not to exceed 8 pages (in the IEEE two-column conference format with 10-pt font size), describing original and unpublished work. Panels and special session proposals are also invited. All submissions must be made electronically in PDF format, using the paper submission web site: https://easychair.org/conferences/?conf=hldvt16. Paper Publication and Presenter Registration: The submission of a paper or panel proposal will be considered as evidence that upon acceptance, the author(s) will present their work. For the papers to appear in the program and proceedings, at least one full workshop registration by an author is required before the submission of the camera-ready version. IEEE reserves the right to exclude a paper from distribution (e.g., removal from IEEE Xplore) if the paper is not presented at the workshop.

Last updated by Dou Sun on 2016-07-22

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