Conference Information

MEMSYS 2025: International Symposium on Memory Systems

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Submission Date:
2025-06-02
Notification Date:
2025-07-14
Conference Date:
2025-10-07
Location:
Washington DC, USA
Years:
11
Viewed: 23392   Tracked: 0   Attend: 2

Call For Papers

MEMSYS 2025 (International Symposium on Memory Systems) is an academic conference held in Washington DC, USA on 2025-10-07. The paper submission deadline is 2025-06-02. Acceptance notifications are sent on 2025-07-14.

Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology- and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges. Please visit memsys.io for more information. Areas of Interest Previously unpublished papers containing significant novel ideas and technical results are solicited. Papers that focus on system, software, and architecture level concepts specifically memory-related, i.e. topics outside of traditional conference scopes, will be preferred over others (e.g., the desired focus is away from pipeline design, processor cache design, prefetching, data prediction, etc.). Symposium topics include, but are not limited to, the following: Memory-system design from both hardware and software perspectives Memory failure modes and mitigation strategies Memory and system security issues Disaggregated Memory (e.g. CXL) Memory for embedded and autonomous systems (e.g., automotive) Operating system design for hybrid/nonvolatile memories Technologies including flash, DRAM, STT-MRAM, 3DXP, etc. Memory-centric programming models, languages, optimization Compute-in-memory and compute-near-memory technologies Data-movement issues and mitigation techniques Interconnects to support large-scale data movement Algorithmic & software memory-management techniques Emerging memory technologies, their controllers, and novel uses Interference at the memory level across datacenter applications Issues in the design and operation of large-memory machines In-memory databases and NoSQL stores Post-CMOS scaling efforts and memory technologies to support them, including cryogenic, neural, and heterogeneous memories Negative results, validation of results, invalidation of results To reiterate, papers that focus on topics outside the scope of traditional architecture conferences will be preferred over others.
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