Conference Information
NVMSA 2023: IEEE Non-Volatile Memory System and Applications Symposium
https://nvmsa2023.github.io/
Submission Date:
2023-04-21 Extended
Notification Date:
2023-05-30
Conference Date:
2023-08-30
Location:
Niigata, Japan
Years:
12
Viewed: 18686   Tracked: 8   Attend: 4

Call For Papers
NVMSA is a premier conference in the area of non-volatile memory systems and emerging memory technologies. It provides a fantastic opportunity for global non-volatile memory researchers from different communities to discuss and exchange knowledge, ideas and insights, and to facilitate the establishment of potential collaborations that can speed up the progress in the design and application of NVMs. An expanded technical program will be offered in NVMSA 2023 for the audience from academia and industry.

Papers are solicited from various topics on NVMs and related areas including, but not limited to:

Device/Circuit Design of NVM Systems:	

    Emerging NVM Circuit Design
    NVM Device Design
    Error Correction for NVMs
    Non-volatile Logic Circuit
    Low Power NVM Circuit

NVM Architecture and Systems:	

    Non-volatile Registers
    Non-volatile Memory Architectures
    Non-volatile Cache Design
    NVM Neuromorphic Architectures
    NVDIMM

NVM Storage:	

    Operating System Support for NVM
    Compiler Optimization for NVM
    NVM-based Storage Software
    NVM-based Databases
    NVM Controller Design

NVM Applications:	

    In-memory Computing
    NVM for Big Data Analytics
    NVM in Mobile Healthcare Applications
    NVM in Wearable Applications
    NVM in the Internet of Things

Both research and industry track papers are solicited. Please make sure that your paper satisfies all the following requirements before being submitted.

    All papers must be submitted electronically in PDF format.
    The submitted manuscripts must describe original work not previously published and not concurrently submitted elsewhere.
    Submissions must be no more than 6 pages in the IEEE conference proceedings format (two-column, single-space).
    Each paper is peer reviewed by the program committee members, and the authors are notified of either "accepted for a long presentation", "accepted for a short presentation", or "reject." Note that authors of a short presentation do not need to shorten the paper itself.
    Accepted papers will be included in the IEEE Xplore and will be EI indexed.
Last updated by Dou Sun in 2023-04-17
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