Información de la conferencia

NOCS 2023: International Symposium on Networks-on-Chip

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Día de Entrega:
2023-05-08 Extendido
Fecha de Notificación:
2023-07-28
Fecha de conferencia:
2023-09-21
Ubicación:
Hamburg, Germany
Ediciones:
17
CCF: C   QUALIS: B1   Vistas: 35030   Seguidores: 23   Asistentes: 1
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Índice Conference Partner (CP-I)

61,0 / 100
Puesto n.º 585 de 5.694 congresos · 11% superior
Reconocimiento académico (35%)
78
Selectividad en la revisión (20%) Sin datos: se puntúa con la línea base neutra de 50 —
Ediciones celebradas (20%)
78
Atención de la comunidad (10%)
44
Integridad del registro público (15%)
25

Datos utilizados: Categorías: CCF C, QUALIS B1 · Ediciones documentadas: 17 · Investigadores que lo siguen aquí: 23 · Investigadores que abrieron esta página en los últimos 24 meses: 5

Falta en el registro público: Tasas de aceptación históricas (+4,5) · Ediciones anteriores (+3,0) · Premios al mejor artículo (+2,3)
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Solicitud de Artículos

NOCS 2023 (International Symposium on Networks-on-Chip) is a CCF C / QUALIS B1 conference held in Hamburg, Germany on 2023-09-21. The paper submission deadline is 2023-05-08 (extended). Acceptance notifications are sent on 2023-07-28.

The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip, package-scale, chip-to-chip, and data center rack-scale communication technology, architecture, design methods, applications and systems. NOCS brings together scientists and engineers working on NoC innovations and applications from inter-related research communities, including discrete optimization and algorithms, computer architecture, networking, circuits and systems, packaging, embedded systems, and design automation. Topics of interest include, but are not limited to: NoC Architecture and Implementation Network architecture (topology, routing, arbitration) Timing, synchronous/asynchronous communication NoC reliability and security issues and solutions Power/thermal issues at NoC un-core and system-level Network interface issues and solutions Signaling and circuit design for NoC links and routers NoC for Embedded High-Performance Computing Systems NoC for FPGA, ASIC, CPU-GPU, CMP, and Data Center on a Chip NoC designs for heterogeneous systems Scalable modeling of NoC Machine Learning (ML) Inspired NoC Design NoC for artificial intelligence (AI) accelerators NoC case studies, application-specific NoC design Communication Analysis, Optimization, and Verification NoC performance analysis and Quality of Service Modeling, simulation, and synthesis of NoC Verification, debug, and test of NoC Benchmarks on NoC-based hardware Communication-efficient algorithms Communication workload characterization & evaluation NoC at the Un-Core and System-level Design of memory subsystem (un-core), including memory controllers, caches, and cache coherence protocols in NoC NoC for new memory/storage technologies NoC support for processing-in-memory OS support for NoC Programming models for NoCs Interactions between large-scale systems (data center, edge, and fog computing) and NoC-based building blocks Emerging NoC Technologies Optical, wireless, CNT, and other emerging technologies NoC for 2.5D and 3D packages NoC Architecture for chiplet-based integrated systems Package-specific NoC design Network coding and compression solutions Approximate computing for NoC and NoC-based systems Inter/Intra-Chip and Rack-Scale Network Unified inter/intra-chip networks Hybrid chip-scale and data center rack-scale networks All aspects of inter-chip and rack-scale network design
Última actualización por Dou Sun el

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