会议信息

GLSVLSI 2026: Great Lakes Symposium on VLSI

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截稿日期:
2026-03-02
通知日期:
2026-04-30
会议日期:
2026-06-22
会议地点:
Finger Lakes, New York, USA
届数:
36
CCF: c   QUALIS: b1   浏览: 38088   关注: 37   参加: 6

征稿

GLSVLSI 2026 (Great Lakes Symposium on VLSI) is a CCF C / QUALIS B1 conference held in Finger Lakes, New York, USA on 2026-06-22. The paper submission deadline is 2026-03-02. Acceptance notifications are sent on 2026-04-30.

Program Tracks VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal circuits, NoC, SoC, IO & interconnects, memories, lab-on-a-chip, biomedical sensors and devices, circuits for wearable or robotic devices, VLSI design and optimization. VLSI for Artificial Intelligence (AI): hardware AI accelerators, novel circuit and architectures for machine learning & AI, brain-inspired and neuromorphic computing hardware, compute-in-memory design. IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems; machine learning for IoT; robots; wearable device and system; network & communication system. Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), timing analysis, signal and power integrity, machine learning and AI for CAD and EDA. Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-resilient design, learning-assisted testing. Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, post CMOS VLSI. Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, side-channel attack/defense, CPS/IoT security, AI for HW security, hardware for classical and post-quantum cryptography. Microelectronic System Education Workshop A one-day co-located workshop will cover the following topics: pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, industry and academic collaborative programs and teaching.
由 Dou Sun 最后更新于

最佳论文

年份最佳论文
2024Incremental SAT-based Exact Synthesis
2024Advanced Continuous-Time Convolution Framework for Security Assurance in Wireless Sensor Networks
2024Application of Quantum Tensor Networks for Protein Classification
2024EDA-schema: A Graph Datamodel Schema and Open Dataset for Digital Design Automation
2024System Architecture Optimization for Vertical Power Delivery
2023Statistical Weight Refresh System for CTT-Based Synaptic Arrays
2023Noise-Resilient and Reduced Depth Approximate Adders for NISQ Quantum Computing
2023Bit-Stream Processing with No Bit-Stream: Efficient Software Simulation of Stochastic Vision Machines
2023IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the Edge
2022Thermal and Power-Aware Run-time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays
2022Protected ECC Still Leaks: A Novel Differential-Bit Side-channel Power Attack on ECDH and Countermeasures
2020Towards Programmable All-Digital True Random Number Generator
2020LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip
2020An Approximate Carry Estimating Simultaneous Adder with Rectification
2018SAT-Lancer: A Hardware SAT-Solver for Self-Verification
2018Adapting Convolutional Neural Networks for Indoor Localization with Smart Mobile Devices
2017LightNN: Filling the Gap between Conventional Deep Neural Networks and Binarized Networks
2016Low-Power Manycore Accelerator for Personalized Biomedical Applications

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