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GLSVLSI 2026: Great Lakes Symposium on VLSI

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投稿締切日:
2026-03-02
通知日:
2026-04-30
開催日:
2026-06-22
開催地:
Finger Lakes, New York, USA
開催回数:
36
CCF: C   QUALIS: B1   閲覧: 40802   フォロー: 37   参加: 6
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GLSVLSI
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会伴インデックス (CP-I)

69.5 / 100
全 5,695 件中 第 347 位 · 上位 7%

システム・アーキテクチャ 分野 340 件中 第 62 位

学術的評価 (35%)
78
投稿の選択性 (20%) データなし — 中立の基準値 50 点として算入 —
開催回数 (20%)
97
コミュニティの注目度 (10%)
52
公開情報の充実度 (15%)
50

使用した入力: 収録ランク：CCF C, QUALIS B1 · 確認できる開催回数：36 · 会伴でフォローしている研究者：37 人 · 過去 24 か月にこのページを開いた研究者：9 人

公開情報で不足しているもの: 過去の採択率 (+4.5) · 過去の開催回 (+3.0)
主催者は会議を認証申請したうえで、このページから直接追加できます。スコアは毎晩再計算されます。このスコアを上げるには

信頼度 80% — スコアのうち、中立の基準値ではなく実際に観測されたデータに基づく割合。 このスコアの算出方法 · ランキングを見る · アルゴリズム版 1.1 · 算出日 2026-10-10

論文募集

GLSVLSI 2026 (Great Lakes Symposium on VLSI) is a CCF C / QUALIS B1 conference held in Finger Lakes, New York, USA on 2026-06-22. The paper submission deadline is 2026-03-02. Acceptance notifications are sent on 2026-04-30.

Program Tracks VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal circuits, NoC, SoC, IO & interconnects, memories, lab-on-a-chip, biomedical sensors and devices, circuits for wearable or robotic devices, VLSI design and optimization. VLSI for Artificial Intelligence (AI): hardware AI accelerators, novel circuit and architectures for machine learning & AI, brain-inspired and neuromorphic computing hardware, compute-in-memory design. IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems; machine learning for IoT; robots; wearable device and system; network & communication system. Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), timing analysis, signal and power integrity, machine learning and AI for CAD and EDA. Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-resilient design, learning-assisted testing. Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, post CMOS VLSI. Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, side-channel attack/defense, CPS/IoT security, AI for HW security, hardware for classical and post-quantum cryptography. Microelectronic System Education Workshop A one-day co-located workshop will cover the following topics: pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, industry and academic collaborative programs and teaching.
最終更新：Dou Sun（）

ベストペーパー

年ベストペーパー
2024Incremental SAT-based Exact Synthesis
2024Advanced Continuous-Time Convolution Framework for Security Assurance in Wireless Sensor Networks
2024Application of Quantum Tensor Networks for Protein Classification
2024EDA-schema: A Graph Datamodel Schema and Open Dataset for Digital Design Automation
2024System Architecture Optimization for Vertical Power Delivery
2023Statistical Weight Refresh System for CTT-Based Synaptic Arrays
2023Noise-Resilient and Reduced Depth Approximate Adders for NISQ Quantum Computing
2023Bit-Stream Processing with No Bit-Stream: Efficient Software Simulation of Stochastic Vision Machines
2023IMA-GNN: In-Memory Acceleration of Centralized and Decentralized Graph Neural Networks at the Edge
2022Thermal and Power-Aware Run-time Performance Management of 3D MPSoCs with Integrated Flow Cell Arrays
2022Protected ECC Still Leaks: A Novel Differential-Bit Side-channel Power Attack on ECDH and Countermeasures
2020Towards Programmable All-Digital True Random Number Generator
2020LORAX: Loss-Aware Approximations for Energy-Efficient Silicon Photonic Networks-on-Chip
2020An Approximate Carry Estimating Simultaneous Adder with Rectification
2018SAT-Lancer: A Hardware SAT-Solver for Self-Verification
2018Adapting Convolutional Neural Networks for Indoor Localization with Smart Mobile Devices
2017LightNN: Filling the Gap between Conventional Deep Neural Networks and Binarized Networks
2016Low-Power Manycore Accelerator for Personalized Biomedical Applications

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