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ISSCC 2027: IEEE International Solid-State Circuits Conference

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회원가입 로그인
투고 마감일:
2026-09-09 마감됨
통보일:
2026-10-21
개최일:
2027-02-14
개최지:
San Francisco, California, USA
개최 횟수:
QUALIS: B1   조회: 43176   팔로우: 19   참가: 1
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ISSCC
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회반 지수 (CP-I)

69.9 / 100
전체 5,759개 중 342위 · 상위 6%

전기·전자공학 분야 520개 중 9위

학술적 인정 (35%)
78
투고 선별성 (20%) 데이터 없음 — 중립 기준값 50점으로 계산 —
개최 횟수 (20%)
100
커뮤니티 관심도 (10%)
43
공개 자료 충실도 (15%)
55

사용한 입력: 수록 등급: QUALIS B1 · 확인되는 개최 횟수: 74 · 회반에서 팔로우 중인 연구자: 19명 · 지난 24개월 동안 이 페이지를 연 연구자: 6명

공개 자료에서 빠진 항목: 역대 게재율 (+4.5) · 최우수 논문 기록 (+2.3)
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신뢰도 80% — 점수 중 중립 기준값이 아니라 실제 관측된 데이터에 근거한 비율. 이 점수는 어떻게 계산되나 · 전체 순위 보기 · 알고리즘 버전 1.2 · 산출일 2026-10-23

논문 모집

ISSCC 2027 (IEEE International Solid-State Circuits Conference) is a QUALIS B1 conference held in San Francisco, California, USA on 2027-02-14. The paper submission deadline is 2026-09-09. Acceptance notifications are sent on 2026-10-21.

Topics of Interest ISSCC 2027 Conference Theme: Trusted Sustainable Silicon Intelligence from Edge to Cloud. This year’s theme highlights how circuit and system research enables secure, energy-efficient, and trustworthy intelligent IC and SoC innovations across the entire computing continuum, from ultra-low-power edge devices and sensors to high-performance cloud infrastructure. Innovative & Significant Submissions ISSCC seeks papers with outstanding innovation (e.g., novel circuit/system architectures) and/or significance (e.g., high-volume product deployment, advances in state-of-the-art metrics). Some innovative works may not have a best-in-class metric yet explore new architectures, challenge fundamental tradeoffs, or open new directions; industry firsts and state-of-the-art advances are equally welcome. A high level of technical quality and clarity is required for all submissions. Subject Areas ANALOG: Circuits with analog-dominated innovation; amplifiers, comparators, oscillators, filters, references; nonlinear analog circuits; digitally assisted analog circuits; sensor interface circuits; MEMS sensor/actuator interfaces, analog front-ends; analog circuits in sub-10nm scaled technologies. DATA CONVERTERS: Nyquist-rate and oversampling A/D and D/A converters; embedded and application-specific converters; time-to-digital converters; S&H circuits. Focus is on innovative and emerging converter architectures and integration advantages within larger systems, rather than the figure of merit of isolated converters. Consider converter peripherals (input, reference, clock drivers); calibration should focus on innovation, robustness, and practical usability. DIGITAL CIRCUITS, ARCHITECTURES & SYSTEMS*: Digital circuits, building blocks, architectures and HW optimizations of complete systems (monolithic, chiplets, 2.5D, 3D) for micro/application/graphics/automotive/ML/AI and SoC processors; accelerators for communications, video, cloud and datacenter; reconfigurable, near-/sub-threshold and approximate computing; intra-chip communication, clocking (PLLs/DLLs), soft-error/variation tolerance, power management; ML/AI systems including near- and in-memory computation and hardware for transformers, graph and spiking networks, and hyper-dimensional computing. IMAGE SENSORS & DISPLAYS**: Image sensors; vision sensors including event-based and computer sensors; LiDAR, time-of-flight and depth sensing; ML and edge computing for imaging; display drivers, touch sensing, haptic displays, and interactive display/sensing for AR/VR. MEDICAL**: Medical devices; biomedical sensors and SoCs; brain-computer and neural interfaces and closed-loop systems; wearable, implantable, and ingestible devices; ultrasound and medical imaging; medical optical microsystems; body-area networks; wireless power/communication to implants; ML and edge computing for medical applications; combinatorial innovation including sensor fusion for disruptive clinical outcomes. MEMORY: Static, dynamic, and non-volatile memories for stand-alone and embedded applications; memory/SSD controllers; high-bandwidth I/O for memories; phase-change, magnetic, STT, ferroelectric, and resistive memories; array architectures for low-voltage operation, power, reliability, performance, fault tolerance; in-memory and near-memory computing macros for AI and other applications. POWER MANAGEMENT: Power management, delivery, and control; switched-mode converter ICs (inductive, capacitive, piezoelectric, hybrid); LDO/linear regulators; power delivery for heterogeneous and 2.5/3D integration; gate drivers; wide-bandgap (GaN/SiC) designs; isolated and wireless converters; envelope supply modulators; energy harvesting; power management for automotive/harsh environments, robotics, LED drivers, and LiDAR. RF CIRCUITS & WIRELESS SYSTEMS***: Complete solutions and building blocks at RF, mm-Wave, and THz for receivers, transmitters, synthesizers, RF filters, front-end modules, multi-element transceivers, SoCs, and wireless SiPs with multiple chiplets; techniques and heterogeneous packaging for established and emerging wireless standards and novel applications such as sensing, radar, imaging, satellite communications, integrated sensing and communications, and IoT. SECURITY: Cryptographic accelerators (classical, PQC, FHE, and protocols such as ZKP, MPC, OT); smart-card security; trusted and confidential computing; secure processors and memories; security primitives (PUFs, TRNGs, secure OTPs, side-channel/fault countermeasures); security for resource-constrained systems; secure analog/mixed-signal/RF; secure supply chains; security for/with AI; secure system design and HW/SW co-design. TECHNOLOGY DIRECTIONS: Emerging IC, system, and device solutions: integrated photonics and silicon electronic-photonic integration; quantum devices for metrology/sensing/computing; flexible, stretchable, foldable, printable, and 3D electronics; biomedical/chemical sensors; wireless power transfer at distance; ICs for space and extreme environments; unconventional platforms for computing and ML including analog/mixed-signal; AI for analog automated IC design; integrated meta-materials and alternative device platforms. WIRELINE: Receivers/transmitters/transceivers for wireline systems: backplane, copper-cable, chip-to-chip, die-to-die, on-chip/on-package links, high-speed memory interfaces; optical links and silicon photonics; exploratory I/O for data rate, bandwidth density, power efficiency, equalization, robustness; building blocks such as AGCs, AFEs, ADC/DAC/DSPs, TIAs, equalizers, clock generation/distribution (PLLs/DLLs), clock recovery, line drivers, and hybrids.
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