会议信息

HOST 2027: IEEE International Symposium on Hardware-Oriented Security and Trust

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截稿日期:
2026-11-01 还有 18 天
通知日期:
2027-02-09
会议日期:
2027-05-03
会议地点:
Washington DC, USA
届数:
浏览: 27106   关注: 1   参加: 0
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HOST
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会伴指数 (CP-I)

54.5 / 100
全站第 911 名 / 共 5,696 个会议 · 前 16%

安全与隐私 第 71 / 362

学术认可 (35%) 无数据 —— 按中性基准 50 分计入 —
投稿选择性 (20%) 无数据 —— 按中性基准 50 分计入 —
会议传承 (20%)
82
社区关注 (10%)
24
资料公开度 (15%)
55

用到的输入: 有据可查的届次:20 · 在会伴关注它的研究者:1 人 · 过去 24 个月打开过本页的研究者:9 人

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主办方认领本会议后,可直接在这一页补上;分数每晚重算。如何提升这个分数

置信度 45% —— 分数中有多大比例来自实际观测到的数据,而不是中性基准。 这个分数是怎么算出来的 · 查看完整榜单 · 算法版本 1.1 · 算于 2026-10-13

征稿

HOST 2027 (IEEE International Symposium on Hardware-Oriented Security and Trust) is an academic conference held in Washington DC, USA on 2027-05-03. The paper submission deadline is 2026-11-01. Acceptance notifications are sent on 2027-02-09.

IEEE International Symposium on Hardware Oriented Security and Trust (HOST) – the premier event aiming to facilitate the rapid growth of hardware security research and development – has opened the call for contributions. The 20th HOST will be held in May 2027 at Washington, DC. HOST 2027 invites original contributions in all areas of hardware and security, including but not limited to: AI and Hardware Security: e.g., AI for hardware security enforcement or finding hardware vulnerabilities, hardware security for AI models, new security principles for trustworthy AI Computer-aided Design (CAD) for Hardware Security Verification: e.g., design-time verification, testing, and metrics for hardware security across the lifecycle. Hardware Security Primitives: e.g., PUFs, TRNGs, cryptography, post-quantum cryptography, hardware meters. Hardware Attack and Defense: e.g., hardware Trojans, fault injection, side-channels, hardware reverse engineering, hardware obfuscation. Architecture Security: e.g., architectural side-channels, trusted execution environment, FPGA, and reconfigurable fabric security. System Security: e.g., SoC/IP security, CPS/IoT security, sensor network security, smart grid security, cloud security, secure boot, attestation and device provisioning, provenance, hardware–software co-design for security, trusted update mechanisms. Chiplet, Packaging, and Heterogeneous Integration Security: e.g. advanced packaging security, chiplet/interposer trust, die-to-die interfaces, 2.5D/3D integration. Emerging Security and Privacy Threats and Solutions: e.g., privacy-enhancing architecture, blockchain, quantum platforms, cryptocurrency security, and hardware/system security topics.
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