Conference Information

SBAC-PAD 2026: International Symposium on Computer Architecture and High Performance Computing

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Submission Date:
2026-06-07 Extended
Notification Date:
2026-08-03
Conference Date:
2026-10-14
Location:
Madrid, Spain
Years:
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ICORE: C   QUALIS: B2   Viewed: 32162   Tracked: 10   Attend: 3
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SBAC-PAD
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Conference Partner Index (CP-I)

74.4 / 100
Ranked #273 of 5,695 conferences · Top 5%

#51 of 340 in Systems & Architecture

Academic recognition (35%)
68
Submission selectivity (20%)
74
Editions held (20%)
99
Community attention (10%)
34
Public record completeness (15%)
85

Inputs used: Listed as ICORE C, QUALIS B2 · Acceptance rate: 33.5% (mean of 5 editions on file) · Editions on record: 38 · Researchers following it here: 10 · Researchers who opened this page in the past 24 months: 3

Missing from the public record: Best-paper records (+2.3)
Organizers can add these from this page after claiming the conference; scores are recomputed nightly. How to raise this score

Confidence 100% - the share of the score backed by observed data rather than the neutral baseline. How this score is calculated · Browse the ranking · Algorithm version 1.1 · Computed 2026-10-11

Call For Papers

SBAC-PAD 2026 (International Symposium on Computer Architecture and High Performance Computing) is a ICORE C / QUALIS B2 conference held in Madrid, Spain on 2026-10-14. The paper submission deadline is 2026-06-07 (extended). Acceptance notifications are sent on 2026-08-03.

Tracks Authors are invited to submit original manuscripts to one of six tracks that address challenges in any of the following areas related to the fields of Computer Architecture (CA) and High-performance and Distributed Computing (HPDC). Track 1 - System Software: Focuses on the design, implementation, and optimization of operating systems, compilers, runtimes, and middleware for high-performance, parallel, and distributed computing environments. Topics include virtualization, scheduling, resource management, and programming support for emerging architectures. Track 2 - Computer Architecture: Covers advances in processor, memory, interconnect, and accelerator design, including GPUs, FPGAs, and near-data processing. This track also welcomes contributions on reconfigurable, energy-efficient, resilient, and secure architectures for modern computing systems. Track 3 - Distributed Systems, Networking and Storage: Explores scalable distributed infrastructures such as clouds, clusters, and edge/fog systems. It also includes work on networking technologies, data management, storage systems, and I/O frameworks for data-intensive and high-throughput workloads. Track 4 - Parallel Applications and Algorithms: Dedicated to the development and analysis of parallel and distributed algorithms, programming models, and real-world scientific and engineering applications. Submissions addressing performance, scalability, and resilience on modern architectures are particularly encouraged. Track 5 - Performance Evaluation: Focuses on benchmarking, modeling, simulation, and analytical methods for evaluating and predicting the performance of hardware and software systems. Topics include power-aware and predictive performance models, as well as tools for profiling and optimization. Track 6 - Parallel and Distributed Computing for AI and Data Analytics: Encompasses AI and machine learning methods applied to computer architecture and high-performance computing, as well as the use of HPC for AI workloads. It also includes tools, frameworks, and data-driven approaches that enhance productivity and insight in large-scale computing environments. The program committee will select the top-ranked papers as finalists, and one paper will be selected during the conference as the Best Paper.
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Acceptance Ratio

Average acceptance rate: 36.4% over 12 years (1999–2011).

YearSubmittedAcceptedAccepted(%)
2011762634.2%
20101003030%
2009602135%
2008572238.6%
20071073229.9%
2006712332.4%
2005832934.9%
2004932931.2%
20031033130.1%
2002742533.8%
2000704158.6%
1999904347.8%

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