# VDAT — International Symposium on VLSI Design and Test

- **Submission deadline**: 2026-04-30
- **Notification date**: 2026-06-30
- **Conference date**: 2026-08-20
- **Location**: Noida, Uttar Pradesh, India
- **Conference Partner Index**: 52.6/100 (ranked #1126, confidence 0.45, algorithm 1.1) — how this is computed: https://www.myhuiban.com/ranking
- **Trackers**: 0
- **Attendees**: 0
- **Canonical page**: https://www.myhuiban.com/conference/5482

## Call for papers

Conference Tracks Track 1 : VLSI & System-on-Chip (SoC) Design Digital, Analog & Mixed-Signal Design Low-Power & High-Performance Architectures Heterogeneous SoC Integration Embedded & Real-Time Systems Memory Subsystems & On-Chip Interconnects Track 2 : Nanoelectronics, Emerging Devices & Beyond-CMOS Technologies FinFET, GAA, Nanosheet & Advanced Transistor Structures 2D Materials & Novel Semiconductor Devices Spintronics & Neuromorphic Devices Device Modeling & Reliability Cryogenic & Advanced Device Technologies Track 3 : Electronic Design Automation (EDA), CAD & AI-Driven Design Physical Design & Place-and-Route Design Space Exploration AI/ML for EDA & Automation Statistical & Formal Verification Design Automation for Advanced Technology Nodes Track 4 : Design Automation for Advanced Technology Nodes Hardware Accelerators for Deep Learning Edge AI & Low-Power AI Systems In-Memory & Near-Memory Computing for AI AI for Semiconductor Manufacturing & Yield Efficient Architectures for LLMs & Emerging AI Models Track 5 : Verification, Testing, Reliability & Hardware Security Design-for-Testability (DFT) & Built-In Self-Test (BIST) Hardware Trust & Security Architectures Fault Tolerance & Resilient Systems Aging, Variability & Radiation Effects Secure SoC & Cryptographic Hardware Track 6 : 3D-IC, Advanced Packaging & Heterogeneous Integration 2.5D/3D IC Integration Chiplets & System-in-Package Thermal & Power Integrity in 3D Systems Advanced Interconnect & TSV Technologies Packaging Solutions for AI & High-Performance Systems Track 7 : Quantum & Future Computing Architectures Quantum Computing Devices & Architectures Quantum Circuit Design & Error Correction Cryogenic CMOS for Quantum Systems A Beyond-CMOS Computing Paradigms Hybrid Classical–Quantum Architectures

## Related conferences

- VLSI — International Conference on VLSI — https://www.myhuiban.com/conference/2451
- VTS — VLSI Test Symposium — https://www.myhuiban.com/conference/1489
- IDT — IEEE International Design & Test Symposium — https://www.myhuiban.com/conference/1818
- SIGIR — International Conference on Research and Development in Information Retrieval — https://www.myhuiban.com/conference/141
- AAAI — AAAI Conference on Artificial Intelligence — https://www.myhuiban.com/conference/408

## Related journals

- VLSI Design — https://www.myhuiban.com/journal/661
- IEEE Design & Test — https://www.myhuiban.com/journal/1162
- IEEE Transactions on Multimedia — https://www.myhuiban.com/journal/152
- Knowledge-Based Systems — https://www.myhuiban.com/journal/227
- Software & Systems Modeling — https://www.myhuiban.com/journal/99

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Source: Conference Partner — https://www.myhuiban.com/conference/5482 (rankings reproduced from CCF / ICORE / QUALIS; data cached up to 1 hour)