# DDECS — IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems

- **Submission deadline**: 2026-01-11
- **Notification date**: 2026-02-27
- **Conference date**: 2026-04-27
- **Location**: Bratislava, Slovakia
- **Rankings**: CORE C · QUALIS B3
- **Conference Partner Index**: 55.4/100 (ranked #815, confidence 0.80, algorithm 1.1) — how this is computed: https://www.myhuiban.com/ranking
- **Trackers**: 0
- **Attendees**: 0
- **Canonical page**: https://www.myhuiban.com/conference/1275

## Call for papers

Topics of interest include the following main areas (but are not restricted to them): Digital Circuit Design and Next Generation Chips VLSI circuit design SoC and NoC architectures FPGA, DSP, accelerators High-performance computing Low-power design Embedded and cyber-physical systems EDA tools and methodologies Machine learning-based and Open-source EDA tools DNN accelerators Edge computing Verification and Test Test of circuits and systems Fault-tolerance Self-health awareness and fault management Test infrastructures Diagnosis and debug Formal and functional verification Dependability Machine learning in test and dependability Verification and dependability for machine learning Analog Circuit Design and Test Analog and mixed-signal circuits Wireless circuits and systems High-frequency circuits Sensor technology RF design and test Analog neuromorphic circuits Memristor technology Emerging Technologies & Security Brain-inspired computing Polymorphic and ambipolar circuits Quantum computing Stochastic and approximate computing In-memory computing Chiplet technology Emerging memory devices Silicon photonics Microfluidics and biochips Cryptographic circuits Attacks against implementations Side-channel analysis Trusted computing platforms IP protection and reverse engineering Hardware Trojans

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Source: Conference Partner — https://www.myhuiban.com/conference/1275 (rankings reproduced from CCF / ICORE / QUALIS; data cached up to 1 hour)