# GLSVLSI — Great Lakes Symposium on VLSI

- **Submission deadline**: 2026-03-02
- **Notification date**: 2026-04-30
- **Conference date**: 2026-06-22
- **Location**: Finger Lakes, New York, USA
- **Rankings**: CCF C · QUALIS B1
- **Conference Partner Index**: 69.4/100 (ranked #341, confidence 0.80, algorithm 1.1) — how this is computed: https://www.myhuiban.com/ranking
- **Trackers**: 37
- **Attendees**: 6
- **Canonical page**: https://www.myhuiban.com/conference/1169

## Call for papers

Program Tracks VLSI Circuits and Design: ASIC and FPGA design, microprocessors/micro-architectures, embedded processors, high-speed/low-power circuits, analog/digital/mixed-signal circuits, NoC, SoC, IO & interconnects, memories, lab-on-a-chip, biomedical sensors and devices, circuits for wearable or robotic devices, VLSI design and optimization. VLSI for Artificial Intelligence (AI): hardware AI accelerators, novel circuit and architectures for machine learning & AI, brain-inspired and neuromorphic computing hardware, compute-in-memory design. IoT and Smart Systems: circuits, computing, processing, and design of IoT and smart systems such as smart cities, smart healthcare, smart transportation, smart grid etc.; cyber-physical systems; machine learning for IoT; robots; wearable device and system; network & communication system. Computer-Aided Design (CAD): hardware/software co-design, high-level synthesis, logic synthesis, simulation and formal verification, layout, design for manufacturing, algorithms and complexity analysis, physical design (placement, route, CTS), timing analysis, signal and power integrity, machine learning and AI for CAD and EDA. Testing, Reliability, Fault-Tolerance: digital/analog/mixed-signal testing, reliability, robustness, static/dynamic defect- and fault-recoverability, variation-resilient design, learning-assisted testing. Emerging Computing & Post-CMOS Technologies: nanotechnology, quantum computing, approximate and stochastic computing, post CMOS VLSI. Hardware Security: trusted IC, IP protection, hardware security primitives, reverse engineering, side-channel attack/defense, CPS/IoT security, AI for HW security, hardware for classical and post-quantum cryptography. Microelectronic System Education Workshop A one-day co-located workshop will cover the following topics: pedagogical innovations using a wide range of technologies such as ASIC, FPGA, multicore, GPU, TPU, educational techniques including novel curricula and laboratories, assessment methods, distance learning, textbooks, and design projects, industry and academic collaborative programs and teaching.

## Related conferences

- VLSI — International Conference on VLSI — https://www.myhuiban.com/conference/2451
- ICC — International Conference on Communications — https://www.myhuiban.com/conference/318
- IJCNN — International Joint Conference on Neural Networks — https://www.myhuiban.com/conference/428
- TrustCom — International Conference on Trust, Security and Privacy in Computing and Communications — https://www.myhuiban.com/conference/1289
- ICONIP — International Conference on Neural Information Processing — https://www.myhuiban.com/conference/437

## Related journals

- VLSI Design — https://www.myhuiban.com/journal/661
- Knowledge-Based Systems — https://www.myhuiban.com/journal/227
- Future Generation Computer Systems — https://www.myhuiban.com/journal/36
- Neurocomputing — https://www.myhuiban.com/journal/234
- Pattern Recognition Letters — https://www.myhuiban.com/journal/236

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Source: Conference Partner — https://www.myhuiban.com/conference/1169 (rankings reproduced from CCF / ICORE / QUALIS; data cached up to 1 hour)